The compiler would rather shift
Here's the first big personality trait of this compiler: for a multiplication by a small constant, it essentially never uses the multiply unit. On the N64's CPU a real multiply is slow, so IDO builds the product out of shifts and adds/subtracts instead. sll rd, rt, k — shift left logical — moves the bits left by k places, and every place doubles the value: sll by 2 is ×4, by 3 is ×8.
A single sll therefore means a power of two. For anything else, IDO chains shifts with subtractions and additions. Watch it build ×6:
sll v0, a0, 2 # v0 = n * 4
subu v0, v0, a0 # v0 = n*4 - n = n * 3
sll v0, v0, 1 # v0 = n*3 * 2 = n * 6
jr ra
nop
No multiply instruction anywhere — just (4n − n) × 2. To decode a chain like this, walk it line by line and track what multiple of the input each register holds, exactly like the comments above. By the last line the register holds one clean constant times the input, and that constant is what the C multiplies by.
The target below is the same trick with a different ending. Run the algebra all the way down.
Your task
Write mulConst, taking an s32 x, to reproduce the shift chain in the target assembly.